LDACS1 Demonstrator

In the development of LDACS1, testing and verification plays a crucial role. Therefore, DLR has developed an experimental setup for the generation and processing of LDACS1 radio signals in the laboratory, which we call the LDACS1 demonstrator.

It consists of a transmitter and a receiver setup, both comprising an analogue frequency conversion and amplification unit, as well as a digital signal processing unit.

Figure LDACS Demonstrator 1

The signal processing system contains D/A and A/D converters to interface with the RF frontend at an intermediate frequency of 30 MHz, and uses FPGA technology for signal processing in the digital domain. With the FPGA design developed at DLR, any LDACS1 signal according to the published specification can be generated. The RF frontend handles analogue signal amplification and frequency conversion. It can be tuned to channels in the aeronautical L-band between 985 MHz and 1072 MHz with a 500 kHz channel spacing. Thanks to its duplexer filters, it permits full-duplex operation with frequency-division duplexing (FDD) as per the LDACS1 specification.

The LDACS1 demonstrator has already been used successfully in tests of the LDACS1 communication performance as well as in compatibility tests with legacy aeronautical radio equipment. The latter were conducted at the laboratories of DFS, the German ATC authority and investigated interference between LDACS1 and the navigational Distance Measurement Equipment (DME). As a first result, it could be confirmed that LDACS1 can operate under severe interference from DME. Secondly, important data has been collected for the establishment of the necessary separation criteria which warrant the correct operation of both systems.

Figure LDACS Demonstrator 2

Further technical details on the implementation of the LDACS1 demonstrator and on the compatibility experiments have been published in several papers presented at international conferences.